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IWLPC CONFERENCE AND EXPO TO TRACK LEADING-EDGE PACKAGING, TEST TECHNOLOGIES

October 4, 2004
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Mark your calendar now to attend the inaugural International Wafer-Level Packaging Congress (IWLPC) and Tabletop Exhibition, sponsored jointly by the SMTA and Chip Scale Review magazine. A dual-track program addresses package design concerns, package assembly, fabrication technologies, board design for chip scale packages and test/reliability. See just how IWLPC will feature 10 half-day workshops from Sunday through Tuesday, led by industry professionals. Featured workshops will expolore issues in wire bonding, wafer bumping, encapsulants, lead-free strategies and test. Join SMTA and Chip Scale Review for the premiere of this exciting event and see just how wafer-level packaging, chip scale packaging, system-on-chip, and system-on-package will affect the semiconductor packaging business.

For more information, call (952) 920-7682.

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