ADVANCING ADHESIVES: 3M and IBM to Develop Semiconductor Adhesives
New adhesives will make it possible to build commercial microprocessors composed of layers of up to 100 separate chips.
3M and IBM recently announced a plan to jointly develop the first adhesives that can be used to package semiconductors into densely stacked silicon “towers.” The companies are aiming to create a new class of materials that will make it possible to build, for the first time, commercial microprocessors composed of layers of up to 100 separate chips.
Such stacking would allow for dramatically higher levels of integration for information technology and consumer electronics applications. Processors could be tightly packed with memory and networking, for example, into a “brick” of silicon that would create a computer chip 1,000 times faster than today’s fastest microprocessor, enabling more powerful smartphones, tablets, computers, and gaming devices.
The companies’ work can potentially leapfrog today’s current attempts at stacking chips vertically-known as 3D packaging. The joint research tackles some of the thorniest technical issues underlying the industry’s move to true 3D chip forms. For example, new types of adhesives are needed that can efficiently conduct heat through a densely packed stack of chips and away from heat-sensitive components such as logic circuits.
“Today’s chips, including those containing ‘3D’ transistors, are in fact 2D chips that are still very flat structures,” said Bernard Meyerson, vice president of Research for IBM. “Our scientists are aiming to develop materials that will allow us to package tremendous amounts of computing power into a new form factor-a silicon ‘skyscraper.’ We believe we can advance the state-of-art in packaging, and create a new class of semiconductors that offer more speed and capabilities while they keep power usage low-key requirements for many manufacturers, especially for makers of tablets and smartphones.”
Under the agreement, IBM will draw on its expertise in creating unique semiconductor packaging processes, and 3M will provide its knowledge in developing and manufacturing adhesive materials. “Capitalizing on our joint know-how and industry experience, 3M looks forward to working alongside IBM, a leader in developing pioneering packaging for next-generation semiconductors,” said Herve Gindre, division vice president at 3M’s Electronics Markets Materials Division. “3M has worked with IBM for many years, and this brings our relationship to a new level. We are very excited to be an integral part of the movement to build such revolutionary 3D packaging.”
For more information, visit www.3M.com/electronicbonding or www.ibm.com/chips.
IBM and 3M are developing a new type of electronic "glue" that can be used to build stacks of semiconductors-3D chips. The glue, shown in blue, connects up to 100 separate chips as it conducts heat away from the silicon package. The innovation can create microprocesses 1,000 times more powerful than today's PC chips. (PRNewsFoto/IBM)
3M and IBM recently announced a plan to jointly develop the first adhesives that can be used to package semiconductors into densely stacked silicon “towers.” The companies are aiming to create a new class of materials that will make it possible to build, for the first time, commercial microprocessors composed of layers of up to 100 separate chips.
Such stacking would allow for dramatically higher levels of integration for information technology and consumer electronics applications. Processors could be tightly packed with memory and networking, for example, into a “brick” of silicon that would create a computer chip 1,000 times faster than today’s fastest microprocessor, enabling more powerful smartphones, tablets, computers, and gaming devices.
The companies’ work can potentially leapfrog today’s current attempts at stacking chips vertically-known as 3D packaging. The joint research tackles some of the thorniest technical issues underlying the industry’s move to true 3D chip forms. For example, new types of adhesives are needed that can efficiently conduct heat through a densely packed stack of chips and away from heat-sensitive components such as logic circuits.
“Today’s chips, including those containing ‘3D’ transistors, are in fact 2D chips that are still very flat structures,” said Bernard Meyerson, vice president of Research for IBM. “Our scientists are aiming to develop materials that will allow us to package tremendous amounts of computing power into a new form factor-a silicon ‘skyscraper.’ We believe we can advance the state-of-art in packaging, and create a new class of semiconductors that offer more speed and capabilities while they keep power usage low-key requirements for many manufacturers, especially for makers of tablets and smartphones.”
Bonding Entire Wafers
Many types of semiconductors, including those for servers and games, currently require packaging and bonding techniques that can only be applied to individual chips. 3M and IBM plan to develop adhesives that can be applied to silicon wafers, coating hundreds or even thousands of chips at a single time. Current processes are akin to frosting a cake slice by slice.Under the agreement, IBM will draw on its expertise in creating unique semiconductor packaging processes, and 3M will provide its knowledge in developing and manufacturing adhesive materials. “Capitalizing on our joint know-how and industry experience, 3M looks forward to working alongside IBM, a leader in developing pioneering packaging for next-generation semiconductors,” said Herve Gindre, division vice president at 3M’s Electronics Markets Materials Division. “3M has worked with IBM for many years, and this brings our relationship to a new level. We are very excited to be an integral part of the movement to build such revolutionary 3D packaging.”
For more information, visit www.3M.com/electronicbonding or www.ibm.com/chips.
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